Mainframes: with the z16, IBM accelerates AI by 30 times

IBM launched its new z16 generation of mainframes this week. This one differs mainly from the previous ones by the presence of new processors, called Telum, which would be able to detect a fraud before its operation is executed, avoiding the complexity of a posteriori correction.

“IBM is the benchmark for highly secure transaction processing. With the z16 and its ability to draw real-time conclusions based on a wealth of consistent information, we enable our customers to accelerate their decision-making and thus improve the experience of their users,” said Ric Lewis. , in charge of IBM’s Systems branch, during a dedicated press conference.

Watson’s algorithms implemented in circuits

Put more pragmatically, mainframes are machines used by banks to process credit card transactions, and the aim here is to eliminate the pitfall of victims having to go through painful reimbursement procedures and purchases not paid in stores. In 2020, credit card fraud would have cost US victims no less than $3.3 billion.

Mainframes are also found in insurance companies and airlines, to manage the loans of some and the seats of others. Here, the new Telium processor, which would globally accelerate the functions of IBM’s Watson artificial intelligence engine, would be used to make the execution of offers more reliable upstream.

IBM argues that this new Telum processor would implement in its circuits algorithms resulting from its research on the quantum computer. Like him, Telum would be able to very quickly find the solution that best combines with a problem, rather than evaluating all the possibilities one by one until you find the right one.

These statements from IBM are however to be taken with a grain of salt. Neither IBM nor anyone else has yet succeeded in building a sufficiently functional quantum computer. There’s no reason a silicon chip should be able to “magically” run algorithms designed for a quantum chip.

More likely, Telum integrates alongside its traditional processing cores a chip which analyzes the data being processed on the fly and guesses in their combination the problems before they arise, that is to say long before we seek to resolve them. This on-the-fly analysis was already written into Watson’s algorithms, but implementing it in processor circuitry would speed up its execution by a factor of 30.

4 CPU cards for a total of 256 cores and 40 TB of RAM

Telum is a processor engraved with a fineness of 7 nmn in the factories of Samsung. It is the first IBM processor to which the IBM Research AI Hardware Center collaborated. It has eight cores, each with 256 KB of L1 cache and 32 MB of L2 cache, 50% more than the previous generation z15. Its clock frequency reaches 5 GHz. In addition to traditional execution functions, Telum’s cores therefore integrate a circuit specialized in the execution of AI algorithms. The power delivered by this circuit in the eight cores would total 6 TFLOPs.

However, it is more a question of saying here that the AI ​​algorithms run like on a 6-TFLOP supercomputer; mainframes aren’t meant to solve trillions of floating-point math functions per second, which TFLOPs measure.

IBM packs two Telum processors per socket on a motherboard that contains four sockets. Each socket offers 64 PCIe channels. This card therefore totals 64 cores, 2 GB of L2 cache and 256 PCIe channels. It also contains 10 TB of RAM. The important point in this architecture is that each core can access the caches of others, even if they are on another socket. IBM talks about “virtual” L3 cache, in the sense that there is no additional cache on the motherboard, but it’s just like since a core can reserve its own space in the cache of another heart.

The first model of z16 works together four of these motherboards with four sockets of two processors, that is to say a machine having 256 hearts, 8 GB of cache and 40 TB of RAM in the maximum configuration. Cumulative computing power is around 200 TFLOPs when it comes to AI algorithms.

High throughput and high security

The motherboards communicate with each other through SMP-9 cables that contain 10 optical fibers, plus one for redundancy. Each fiber has a speed of 25 Gbit/s, or 250 Gbit/s per cable. Two redundant SMP-9 cables are required to connect two motherboards. In this configuration with four motherboards, each core can always go and use the cache of another core which is on another motherboard. IBM speaks this time of “virtual L4 cache”.

Like its predecessors, the z16 communicates with its external modules – storage, various inputs-outputs, or Ethernet network to conventional servers – through FICON links (FIber CONnection), IBM’s proprietary network for mainframes. FICON has the particularity of being able to transport the data streams over 10 km, even 100 km with amplifiers along the route. FICOM switches have built-in memory, so if a failure occurs, there is no need to re-request lost packets from the mainframe; they are in the memory of the switch.

Another salient feature of the z16s, these mainframes are equipped with a Crypto Express 8S (CEX8S) card which encrypts the data in memory as soon as the machine is started. According to IBM, this card would be used to prevent any malware infiltration and, by extension, any data extraction by a hacker. IBM suggests that, the day the quantum computer exists, it will be able to decrypt absolutely all data protected by keys, except those hosted on a z16, since it will be impossible to recover them to decrypt them elsewhere.

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Mainframes: with the z16, IBM accelerates AI by 30 times

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